Analytical speedup modeling for parallel applications with variable memoryaccess delay in symmetric architectures
Several analytical models created since Amdahl’s pioneering work have explored aspects such as variation in the size of the problem, memory size, communication overhead, and synchronization overhead. However, delays in memory access are considered constant. Such delays can vary, for example, accord...
সংরক্ষণ করুন:
প্রধান লেখক: | |
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অন্যান্য লেখক: | |
বিন্যাস: | doctoralThesis |
ভাষা: | pt_BR |
প্রকাশিত: |
Universidade Federal do Rio Grande do Norte
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বিষয়গুলি: | |
অনলাইন ব্যবহার করুন: | https://repositorio.ufrn.br/handle/123456789/32749 |
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সংক্ষিপ্ত: | Several analytical models created since Amdahl’s pioneering work have explored aspects such as variation in the size of the problem, memory size, communication overhead, and synchronization overhead. However, delays in memory access are considered
constant. Such delays can vary, for example, according to the number of cores, the relationship between the processor and memory frequencies, and the problem size. Given
different problem sizes and many possible configurations of operational frequency and
number of cores that current architectures can offer, speedup models suitable for describing such differences are quite desirable for either offline or online scheduling decisions.
This thesis presents a novel analytical speedup model that considers variations in the
average data-access delay to describe the limiting effect of the memory wall in parallel
applications associated with homogeneous shared memory architectures. The experimental results indicate that the proposed model incorporates the behavior of the application
adequately. The approach presented in this work shows that considering parameters that
reflect the intrinsic characteristics of applications has advantages over statistical models
such as those based on machine learning. The experiments also show that the conventional
machine learning modeling may require measurements with one order of magnitude above
to achieve the same accuracy level when compared with the proposed model. |
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