Circuito integrado de condicionamento de sinais para sensores wire-mesh aplicados ao monitoramento de escoamentos multifásicos
In many petrochemical and nuclear industry applications, monitoring of streaming oil-watergas- mixtures (multiphase flows) has been motivating the development of investigation methods based on tomographic imaging. Some investigated phenomena, such as gas bubble propagation, feature fast-changing...
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| Formato: | Dissertação |
| Idioma: | por |
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| Endereço do item: | https://repositorio.ufrn.br/jspui/handle/123456789/22567 |
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| Resumo: | In many petrochemical and nuclear industry applications, monitoring of streaming oil-watergas-
mixtures (multiphase flows) has been motivating the development of investigation methods
based on tomographic imaging. Some investigated phenomena, such as gas bubble propagation,
feature fast-changing dynamics, thus demanding a good time resolution of monitoring systems.
In order to achieve faster imaging methods compared to established tomographic techniques,
wire-mesh sensors were developed over the last decade. These sensors, which are inserted inside
pipelines, are composed of an electrode mesh that performs electric impedance measurements,
which can be converted in fluid electrical properties. Despite their intrusive nature, multiphase
flow images can be generated without iterative reconstruction algorithms. It is proposed in this work an integrated circuit (IC) to perform a 4x4 wire-mesh sensor signal conditioning, applied to phase fraction calculations of multiphase flows. The circuit integration reduce the size of conditioning circuits, in comparison with established systems which use discrete components, and also offers customization options to enhance power consumption efficiency. The chip comprises the following blocks: an interface amplifier that converts the sensor output currents into voltage signals; a phase syncronous demodulator, which provides in-phase and quadrature voltage signals that are functions of the main fluid electrical parameters (permittivity
and conductivity); and a low-pass filter, prior to the off-chip analog-to-digital conversion. This
work focuses on the project of the interface amplifier and the low-pass filter. The circuit was designed for a 130-nm standard CMOS technology. The IC validation is performed via post-layout simulations. |
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